One KiCad project in. Parsed and measured for real by the browser, then read, reviewed, or checked for the fab house.

Not until you run a lane. Parsing both files, auditing the annotation, rolling up the BOM, deriving the wire-level nets, measuring the board, checking it against the fab profile and exporting the BOM and the position file all happen in this browser tab with no account and no network call. Only the four AI lanes send anything, and what they send is the text in the two boxes plus the facts the browser measured from exactly that text.

It parses them. A .kicad_sch and a .kicad_pcb are each one S-expression, and this app reads them with a character-state reader: a parenthesis inside a quoted string is not a parenthesis, and a quote after a backslash is not a quote. That is why it can tell you that a Footprint property belongs to R3 rather than to the property that happened to appear near it, and why a parse failure comes back with a line and a column instead of a shrug.

Because they are not, on purpose. Pin coordinates live in the symbol's own frame inside lib_symbols and have to be pushed through each instance's rotation and mirror to land on the sheet. Getting that transform subtly wrong produces a netlist that is confidently wrong at every rotated symbol, which is worse than no netlist. So the nets reported here are wire-level — derived from wire, bus, junction, label and power-symbol geometry, all of which are exact coordinates in the file — and the read-out says so everywhere it matters.

They are this app's record of a vendor's published capability for one process, and vendors change them with an order option. So every check shows the required number next to the measured one and names the profile it came from. A fail here means this board asks for 0.09 mm where the profile you picked lists 0.127 mm — a disagreement between two numbers you can both see, never a verdict that the board cannot be made. Confirm against the options you actually order.

Read explains what the files are, construct by construct, and what the design appears to be. Schematic reviews the schematic as a schematic — annotation, libraries, footprints, values, nets, power, hierarchy, sourcing and documentation — and hands back a corrected S-expression fragment. Board reviews the layout against the fab profile. Order says whether the project can be ordered as it stands, what the gates are, what the BOM and position file are missing, and what is driving the price. All four run over the same paste, and each result offers the next lane as a button.

The browser measures first and sends its facts into the run: every designator, the BOM roll-up, the net list, every board measurement, every fab check and every flag it raised. The model must return one reconciliation entry per flag that matters, so a defect it ignored is displayed as unaccounted for rather than quietly dropped. Every designator, net and layer the model cites is checked against the files you pasted, and one that does not exist is shown, marked, rather than trusted. A corrected S-expression fragment is re-parsed in the browser before you see it, and told to you if it does not balance.

A worst-case amount is reserved before you run and only what the run actually uses is charged. The estimate is checked against your balance before the button enables: signed out, it says signing in comes first; under the model's minimum, it names the exact shortfall; and a reply cut short by a low balance says so rather than presenting itself as complete. The whole browser side is free and needs no account at all.